This invention relates to the measurement of jitter in a digital signal.
In a digital communications system information is transferred by varying a parameter (such as signal amplitude or phase offset) of a signal among a predetermined number of specific values. Typically changes from one parameter value to another are controlled to occur at regular intervals defined by a timebase or clock signal. Identification of the parameter values in a received signal is likewise controlled to occur at these regular intervals, for example in synchronism with transitions in a clock signal in the receiver. Jitter comprises errors in the timing of occurrence of the clock signal transitions, relative to the timing of transitions in an ideal clock signal which would give optimal recovery of the data in the received signal. Jitter can be caused by varying time delays in circuit paths from component to component in the signal path, for example as a result of poor design of elements such as phase locked loops (PLL""s) and waveform distortion due to mismatched impedances and/or reflections in the signal path.
In many telecommunications applications a system is required to xe2x80x9crecoverxe2x80x9d a clock signal from an incoming optical/electrical data signal. A design trade-off commonly encountered is between the ability of the system to operate with variable mark/space density data patterns (which cause variations in the intervals between signal transitions from which a clock signal can be recovered) and its ability to operate adequately in the presence of jitter. In the case of a system for measuring jitter there is a related design trade-off between the frequency flatness and accuracy of a timing recovery filter (TRF) used for clock recovery, and the ability of the measuring system to operate correctly with variable mark/space density data patterns. This latter requirement corresponds to the system""s ability to operate with periods of no timing information to co-ordinate clock recovery, that is periods of continuous runs of a single data value (such as ones or zeroes in a binary system).
Previous jitter measurement solutions have used a TRF with a flat amplitude response against frequency over the bandwidth of interest, in order to meet the technical requirements of the jitter measurement sub-system. This flat amplitude response ensures the jitter is not altered by the measurement equipment before phase demodulation and final jitter measurement. However, the impulse response of a TRF, with such a flat response in the frequency domain is oscillatory (i.e. it xe2x80x9cringsxe2x80x9d), and this can lead to signal transitions in its output signal which can be mistaken for clock transitions. As a result the ability of a system with a flat-response TRF to tolerate periods of continuous single-value data runs without yielding errors in the jitter measurement can be limited. Therefore in typical known systems the jitter measurement capabilities may be acceptable but the ability to operate with different digital test patterns, and in particular with xe2x80x9clivexe2x80x9d traffic is not.
It is an object of this invention to provide a jitter measurement method and apparatus which can tolerate longer runs of one value of data symbol than can such known apparatus.
According to one aspect of this invention there is provided a method for measuring jitter in a digital signal, comprising the steps of:
receiving a digital signal;
recovering a clock signal from the digital signal by using a first filter;
demodulating the recovered clock signal;
filtering the demodulated signal with a second filter having a filter characteristic which is approximately inverse to the baseband amplitude response of the first filter; and
measuring the jitter of the filtered demodulated signal.
According to another aspect of this invention there is provided apparatus for measuring jitter in a digital signal, comprising:
a receiver for receiving a digital signal;
a clock recovery module coupled to the receiver and incorporating a first filter, for recovering a clock signal from the digital signal;
a demodulator coupled to the clock recovery module for demodulating the recovered clock signal;
a second filter coupled to the demodulator for filtering the demodulated signal, said second filter having a filter characteristic which is approximately inverse to the baseband amplitude response of the first filter; and
a jitter measuring module coupled to the second filter for measuring the jitter of the filtered demodulated signal.